The ternary "

**OR**" is very similar to Ternary "**AND**" gate. In the circuit schema we changed just two things: changed the place of transistors and changed the voltage sources: positive with negative. And voila: we have a ternary "**OR**" gate.
Because the ternary logic is a little bit more complicated (in fact, it is much simpler, but we will discuss that thing later :) ), let's do the same steps as we done in the previous post. Ok, let's start:

Logically, the ternary "

**OR**" gate is exact opposite of "**AND**" gate. This means that, having two inputs (**A**and**B**), and each input is considered as a trit with one of three states ("**-1**", "**0**" or "**1**") we need to find not the**minimum**from**A**and**B,**but the**maximum**of these two inputs. Here is the truth table:
We will not describe here each case and provide images here: it's trivial. We just will show the general schema (see the picture below):

That's it. Again, simple. The corresponding code on our emulator on GitHub is published here.

The ternary "

The emulator code for "

**XOR**" gate is composed from combination of "**AND**", "**NOT**" and "**OR**" gates. The formula can be written like this:The emulator code for "

**XOR**" can be found on the GitHub repository page of our project.
Step by step, we are approaching at the final of base gates. This will permit us to construct a full ternary processor. The only gate that remains, it's the summator. We will cover it next time.